The technology we use, and even rely on, in our everyday lives –computers, radios, video, cell phones – is enabled by signal processing. Learn More »
1. IEEE Signal Processing Magazine
2. Signal Processing Digital Library*
3. Inside Signal Processing Newsletter
4. SPS Resource Center
5. Career advancement & recognition
6. Discounts on conferences and publications
7. Professional networking
8. Communities for students, young professionals, and women
9. Volunteer opportunities
10. Coming soon! PDH/CEU credits
Click here to learn more.
News and Resources for Members of the IEEE Signal Processing Society
Neural networks are a set of biologically inspired algorithms that can be used to recognize patterns. Deep neural networks (DNNs) are neural networks that have much more layers in depth than traditional neural networks. DNNs are thus capable of learning high-level features with more complexity and abstraction than shallower neural networks. The use of DNNs has seen explosive growth in the past few years. Currently, DNNs are widely used for many artificial intelligence (AI) applications including computer vision, speech recognition, and robotics. While DNNs deliver state-of-the-art accuracy on many AI tasks, it comes at the cost of high computational complexity. Accordingly, techniques that enable efficient processing of DNNs to improve energy efficiency and throughput without sacrificing application accuracy or increasing hardware cost are critical to the wide deployment of DNNs in AI systems. The article Efficient Processing of Deep Neural Networks: A Tutorial and Survey by V. Sze, Y.-H. Chen, T.-J. Yang, and J. S. Emer published in Proceedings of the IEEE in December, 2017, provides a comprehensive tutorial and survey coverage of the recent advances toward enabling efficient processing of DNNs.
The authors provide an overview of DNNs before discussing various hardware platforms and architectures that support DNNs, and highlighting key trends in reducing the computation cost of DNNs through various techniques such as hardware design changes or via joint hardware design and DNN algorithm changes. The article also summarizes various development resources that will enable the reader to quickly get started in this field, and highlights important benchmarking metrics and design considerations that should be used for evaluating the rapidly growing number of DNN hardware designs, optionally including algorithmic codesigns, being proposed in academia and industry. The article concludes with recent implementation trends and opportunities.
Nomination/Position | Deadline |
---|---|
Call for Proposals: 2025 Cycle 1 Seasonal Schools & Member Driven Initiatives in Signal Processing | 17 November 2024 |
Call for Nominations: IEEE Technical Field Awards | 15 January 2025 |
Nominate an IEEE Fellow Today! | 7 February 2025 |
Call for Nominations for IEEE SPS Editors-in-Chief | 10 February 2025 |
Home | Sitemap | Contact | Accessibility | Nondiscrimination Policy | IEEE Ethics Reporting | IEEE Privacy Policy | Terms | Feedback
© Copyright 2024 IEEE - All rights reserved. Use of this website signifies your agreement to the IEEE Terms and Conditions.
A public charity, IEEE is the world's largest technical professional organization dedicated to advancing technology for the benefit of humanity.