Yousof Mortazavi (The University of Texas at Austin) "Analog-to-Digital Converter Circuit and System Design to Improve with CMOS Scaling" (2015)

You are here

Inside Signal Processing Newsletter Home Page

Top Reasons to Join SPS Today!

1. IEEE Signal Processing Magazine
2. Signal Processing Digital Library*
3. Inside Signal Processing Newsletter
4. SPS Resource Center
5. Career advancement & recognition
6. Discounts on conferences and publications
7. Professional networking
8. Communities for students, young professionals, and women
9. Volunteer opportunities
10. Coming soon! PDH/CEU credits
Click here to learn more.

News and Resources for Members of the IEEE Signal Processing Society

Yousof Mortazavi (The University of Texas at Austin) "Analog-to-Digital Converter Circuit and System Design to Improve with CMOS Scaling" (2015)

Yousof Mortazavi (The University of Texas at Austin) "Analog-to-Digital Converter Circuit and System Design to Improve with CMOS Scaling", Advisor: Brian L. Evans

Nanometer-scale CMOS processes create a hostile environment for voltage-domain analog processing due to reduced supply voltage and smaller capacitance, which increase speed and power efficiency for digital circuits. This dissertation explores alternative analog processing in the time-domain to design oversampled analog-to-digital converters (ADC) for nanoscale CMOS processes. The ADC first converts the analog input voltage to a pulse shape whose length is proportional to the voltage, and performs delta-sigma modulation by adding and subtracting pulse shapes. Unlike traditional voltage-domain processing, the time-domain approach improves circuit performance with CMOS process scaling. Two time-domain oversampled delta-sigma ADCs were designed and fabricated in TSMC 180 nm CMOS and IBM 45 nm Silicon-On-Insulator processes. Both chips achieve bandwidths of 5-20 MHz and 50 dB SNR with very low ADC core area of 0.0275 mm2 and 0.0192 mm2, respectively. Based on the measured responses of the two ADC chips, I determine the source of the harmonic distortion and demonstrate a digital calibration algorithm that sufficiently mitigates the distortion.

For detailed information, please see the thesis page.

SPS Social Media

IEEE SPS Educational Resources

IEEE SPS Resource Center

IEEE SPS YouTube Channel